FlexCase
FCA – Prototype Board
Introduction
This board attaches to the FCG Expansion board-to-board connector and provides access to key FCG signals through a 100 mil through-hole prototyping area and five 16-pin breakout headers. It is a passive adapter that plugs directly onto the FlexCase G (FCG) LSHM board-to-board connector. It is intended for hardware prototyping and early bring-up work where custom through-hole circuits need direct access to FCG MCU and MPU signals.
The board serves three primary purposes:
- Provide a stable, keyed mechanical connection to the 80-pin LSHM connector on the FCG.
- Break out selected FCG signals to five 16-pin through-hole headers (J2–J6) at 100 mil pitch.
- Offer a large 100 mil through-hole prototyping area (J7) where users can solder custom circuitry.
Caution: Many signals available on this board are not protected circuits and could damage the FlexCase G if improperly connected. Exercise caution when utilizing this board.
Pinout on FlexCases
All headers (J2–J6) are 16-pin dual-row 100 mil connectors. Pin 1 is marked on the silkscreen with a square pad. Odd pin numbers are on the left column, even pin numbers are on the right column when the board is oriented with J1 at the top. The user can attach a header, such as TSW-108-07-T-D if they wish to prototype with proto-wires rather than directly soldering.
J7 has the internal connections shown via the silkscreen, with 5 holes being connected horizontally.
| J2 – TSW-108-07-TD (16-pin, 100 mil dual-row) | ||
|---|---|---|
| Header Pin | Function | Notes |
| B2B Header Reserved | ||
| J2-01 | External Pin 18 | External header pin |
| MCU UART 15 | ||
| J2-02 | MCU_UART15_TX | MCU UART 15 transmit. 3.3 V logic. RX counterpart available at J3-16. |
| Power | ||
| J2-03 | GND | Ground reference. |
| LSHM Reserved Signal | ||
| J2-04 | LSHM_P75 | Reserved |
| Power | ||
| J2-05 | +3V3 | |
| J2-06 | +3V3 | |
| J2-07 | +V_BATT | |
| J2-08 | +V_BATT | |
| LSHM Reserved Signals | ||
| J2-09 | LSHM_P70 | Reserved |
| J2-10 | LSHM_P72 | Reserved |
| J2-11 | LSHM_P66 | Reserved |
| J2-12 | LSHM_P68 | Reserved |
| J2-13 | LSHM_P62 | Reserved |
| J2-14 | LSHM_P64 | Reserved |
| J2-15 | LSHM_P58 | Reserved |
| J2-16 | LSHM_P60 | Reserved |
| J3 – TSW-108-07-TD (16-pin, 100 mil dual-row) | ||
|---|---|---|
| Header Pin | Function | Notes |
| LSHM Reserved Signal | ||
| J3-01 | LSHM_P35 | Reserved |
| Power | ||
| J3-02 | GND | Ground reference. |
| J3-03 | +5v0 | |
| J3-04 | +5v0 | |
| B2B External Pins | ||
| J3-05 | External Pin 10 | |
| J3-06 | External Pin 9 | |
| J3-07 | External Pin 12 | |
| J3-08 | External Pin 11 | |
| Power | ||
| J3-09 | GND | Ground reference. |
| J3-10 | GND | Ground reference. |
| B2B External Pins | ||
| J3-11 | External Pin 14 | |
| J3-12 | External Pin 13 | |
| J3-13 | External Pin 16 | |
| J3-14 | External Pin 15 | |
| J3-15 | External Pin 17 | |
| MCU UART 15 | ||
| J3-16 | MCU_UART15_RX | MCU UART 15 receive. 3.3 V logic. TX counterpart available at J2-02. |
| J4 – TSW-108-07-TD (16-pin, 100 mil dual-row) | ||
|---|---|---|
| Header Pin | Function | Notes |
| B2B External Pins | ||
| J4-01 | External Pin 2 | |
| J4-02 | External Pin 1 | |
| Power | ||
| J4-03 | GND | Ground reference. |
| J4-04 | GND | Ground reference. |
| B2B External Pins | ||
| J4-05 | External Pin 3 | |
| J4-06 | External Pin 4 | |
| RS-232 | ||
| J4-07 | RS232 TX | |
| J4-08 | RS232 RX | |
| Power | ||
| J4-09 | GND | Ground reference. |
| B2B External Pins | ||
| J4-10 | External Pin 5 | |
| MCU SPI4 – Chip Selects | 3.3 V logic. MCU is typically SPI slave, MPU master, on this bus. | |
| J4-11 | MCUSPI4_SS2 | SPI4 chip select 2 |
| J4-12 | MCUSPI4_SS1 | SPI4 chip select 1 |
| B2B External Pins | ||
| J4-13 | External Pin 6 | |
| Power | ||
| J4-14 | GND | Ground reference. |
| B2B External Pins | ||
| J4-15 | External Pin 8 | |
| J4-16 | External Pin 7 | |
| J5 – TSW-108-07-TD (16-pin, 100 mil dual-row) | ||
|---|---|---|
| Header Pin | Function | Notes |
| CAN Bus 3 | Differential pair. 120 Ω termination required at each end of bus. | |
| J5-01 | CAN3_N | CAN bus 3 negative (CAN Low). |
| J5-02 | CAN3_P | CAN bus 3 positive (CAN High). |
| MCU–MPU GPIO | 3.3 V logic. Direction defined in FCG firmware. | |
| J5-03 | MCU_MPU_GPIO_1 | General-purpose GPIO between MCU and MPU. |
| MPU Control | ||
| J5-04 | MPU_Sleep | |
| J5-05 | MPU_RESET | |
| LSHM Reserved Signal | ||
| J5-06 | LSHM_P18 | Reserved |
| Power | ||
| J5-07 | GND | Ground reference. |
| J5-08 | GND | Ground reference. |
| MCU–MPU SPI4 | 3.3 V logic. MPU is typically SPI master. MCU is typically SPI slave. | |
| J5-09 | MPUSPI0_MCU4_SS0-0 | SPI chip select 0 |
| J5-10 | MCUSPI4_SI | SPI4 SI |
| J5-11 | MCUSPI4_SCK | SPI4 clock |
| J5-12 | MCUSPI4_SO | SPI4 SO |
| I2C 1 (Reserved) | ||
| J5-13 | I2C1_RSRV_SCL | I2C1 clock (reserved). |
| J5-14 | I2C1_RSRV_SDA | I2C1 data (reserved). |
| LSHM Reserved Signal | ||
| J5-15 | LSHM_P36 | Reserved |
| Power | ||
| J5-16 | GND | Ground reference. |
| J6 – TSW-108-07-TD (16-pin, 100 mil dual-row) | ||
|---|---|---|
| Header Pin | Function | Notes |
| Power | ||
| J6-01 | +5v0 | |
| J6-02 | +5v0 | |
| J6-03 | GND | Ground reference. |
| J6-04 | GND | Ground reference. |
| USB 2.0 | Maintain matched-length routing. | |
| J6-05 | B2B_USB_D_N | USB 2.0 D−. Keep trace length matched to D+. |
| J6-06 | B2B_USB_D_P | USB 2.0 D+. Keep trace length matched to D−. |
| LSHM Reserved Signals | ||
| J6-07 | LSHM_P52 | Reserved |
| J6-08 | LSHM_P54 | Reserved |
| J6-09 | LSHM_P56 | Reserved |
| Power | ||
| J6-10 | GND | Ground reference. |
| J6-11 | +3v3 | |
| J6-12 | +3v3 | |
| J6-13 | +V_BATT | |
| J6-14 | +V_BATT | |
| J6-15 | GND | Ground reference. |
| J6-16 | GND | Ground reference. |
Getting Started
Mating the Board to the FCG
1. Power off the FCG completely before installing the adapter.
2. Align J1 (the LSHM connector, pin 1 marker) with the mating connector on the FCG. Confirm orientation – the connector is keyed but exercise care.
3. Apply firm, even downward pressure until the connectors fully engage. Do not rock or twist.
4. Verify the standoffs are seated and the board is parallel to the FCG PCB.
Signal Levels & Protection
See the FlexCase G datasheet LSHM Expansion Board section for information on the exact pin details.
